Synopsys Integrates Thermal Analysis into Silicon Design Workflows

Synopsys reported a 42% year-over-year revenue increase to $2.477 billion for the third quarter of fiscal year 2026, driven by the successful integration of Ansys technologies into its core electronic design automation (EDA) platforms. This financial performance, detailed during the company’s earnings call on August 26, 2026, reflects a broader industry shift toward complex, multidie architectures requiring advanced thermal and multiphysics simulation.

The integration of Ansys software has enabled the launch of Multiphysics Fusion, a solution that embeds thermal analysis directly into the chip design flow. Sassine Ghazi, president and CEO of Synopsys, stated that this is the industry’s only solution with thermal analysis fully integrated into the chip design process. By embedding these physics-based simulations earlier in the design cycle, engineers can address heat dissipation challenges before physical prototyping.

Design automation revenue reached $2 billion, excluding the divested Optical Solutions Group, while the design IP segment grew 11% to $474 million. This growth is largely attributed to the rising demand for artificial intelligence infrastructure, which necessitates high-bandwidth connectivity and specialized memory interfaces. The company reported a 95% win rate for PCIe 7 opportunities and 25 year-to-date wins for LPDDR6 solutions.

The company is also deploying agentic artificial intelligence to automate complex design verification tasks. These autonomous workflows are reportedly reducing debug cycle times by up to 40% while accelerating design verification by up to 50-fold. Currently, more than 30 active customer engagements are utilizing this autonomous design platform to manage the increasing complexity of modern system-on-chip (SoC) development.

The transition to the Factory 2 customized intellectual property model represents a strategic shift in revenue structure. This model moves the company from a traditional licensing-only framework to one that incorporates royalty-based revenue streams. Sassine Ghazi noted that this transition moves the organization up the value chain and positions it to capture the expanding market for custom silicon, providing a more predictable long-term revenue trajectory.

Hardware-assisted verification saw record quarterly revenue, supported by 12 new customer wins and 66 repeat engagements. This demand stems from the increasing difficulty of verifying multidie architectures, where traditional simulation methods often fail to capture the necessary performance metrics. The company’s focus on die-to-die business is currently on pace to double revenue year over year, with more than 100 cumulative design wins.

The integration of Ansys contributed $711 million to the quarterly total, with management noting that cost synergy commitments are currently ahead of schedule. This operational efficiency allowed the company to repay term loans ahead of the planned timeline. CFO Shelagh Glaser confirmed that the company maintains a strong cash position, with free cash flow for the quarter reaching $746 million.

The shift toward multidie architectures and advanced nodes, such as 3-nanometer and 5-nanometer processes, remains a critical driver for the EDA sector. As chip complexity increases, the ability to integrate thermal, power, and signal integrity analysis into a single, automated flow becomes a competitive necessity for semiconductor firms. The adoption of agentic AI for verification suggests that the industry is moving toward a more autonomous design paradigm where software handles the heavy lifting of validation.

This technical evolution is essential for maintaining performance benchmarks in high-compute environments where thermal throttling can negate the benefits of advanced silicon. By consolidating these disparate simulation tools into a unified environment, Synopsys is effectively reducing the friction between architectural design and physical implementation. This integration represents a fundamental change in how engineers approach the lifecycle of a chip, moving from reactive testing to proactive, simulation-driven design.

Future performance will likely depend on the continued adoption of the Factory 2 IP model and the scalability of agentic AI workflows across diverse silicon architectures. The company has raised its full-year revenue guidance to a range of $9.69 billion to $9.74 billion, signaling confidence in sustained demand for high-performance computing infrastructure. Analysts will be monitoring the fourth-quarter transition to double-digit growth in the EDA segment as a key indicator of market health.